1. Field of the Invention
The invention relates to a sense amplifier in a DRAM (Dynamic RAM) having double power lines, and more particularly, to a sense amplifier in a partially activatable DRAM having double power lines with an increased sensing ability and a low peak current value.
2. Information Disclosure Statement
Generally, when information data is stored in a memory cell and read from the memory cell, a sense amplifier for sensing and amplifying the information data existed at a pair of bit lines is used in a DRAM. Thus, it is necessary to have sense driving transistors with a large gate width, that is a N-channel sense amplifying unit, and restore driving transistors with a large gate width, that is a P-channel sense amplifying unit, in order to sense and amplify each information data having a little voltage difference between a pair of bit lines.
However, in case of using the driving transistors having a large gate width, there is a disadvantage in that the sense amplifier fails to properly perform due to a high peak current value and a lack of equilibrium in the capacitance between the pair of bit lines. Furthermore, where the driving transistor having a small gate width in order to have a low peak current value, there are disadvantages in that the access time becomes long and the sensing velocity of the sense amplifier is decreased.
For solving above mentioned problems, one method uses a separate power line is independently used in each P-channel and N-channel amplifying unit of the sense amplifier so that the peak current value is decreased.
However, where a separate power line is used in the sense amplifier, when the sense amplifier operates in its slope sensing in the first step of the sensing operation, the separate power lines for supplying separate voltage sources Vcc and Vss, respectively, to each P-channel and N-channel amplifying unit already contain a substantial amount of the noise owing to its inductance. Therefore, it is impossible to solve the disadvantage of the prior art. Also, in a partially activatable DRAM comprising a plurality of blocks, a driving transistor in an unselected block not requiring the information output and having the same gate width as that of the driving transistor in a selected block is also operated so that a high peak current value occurs in the DRAM.
Accordingly, it is an object of the present invention to solve the disadvantages mentioned above and to provide a sense amplifier in the DRAM having double power lines.
The preceding objects should be construed as merely presenting a few of the more pertinent features and applications of the invention. Many other beneficial results can be obtained by applying the disclosed invention in a different manner or modifying the invention within the scope of the disclosure. Accordingly, other objects and a fuller understanding of the invention may be had by referring to both the summary of the invention and the detailed description, below, which describe the preferred embodiment in addition to the scope of the invention defined by the claims considered in conjunction with the accompanying drawings.